It feels to me that, in general, interrupts come asynchronously so if the CPU reacts one cycle late (or early) shouldn't break anything. Exceptions being perhaps cycle-counted demo or game code, of course. So the Vsync, and the VIAs, would need to be kept as-is for cycle timing.
Is it easy to try it out as an idea?
Is it easy to try it out as an idea?
Statistics: Posted by BigEd — Wed Feb 12, 2025 10:30 pm