You've already identified the 65802, a variant of the 65816, which is a continuation of the 65C02 with a 16-bit stack pointer and a direct page register, which means the advantages of zero page can be extended to more of memory. But this took time to design and wasn't fully released until 1985, too late for Acorn to have chosen it for the Master series or the original 6502 second processor.
It would not have caused any excitement at Acorn as they were already pursuing the ARM as their more modern processor. The advantage of 6502 compatibility is for running 6502 code written in assembler. As soon as you want to run code written in a high level language it is only the code generating part of the compiler you need to change.
Back to the other 8-bit processors of the day, the 8080, before the Z80, had plenty of registers but didn't have many addressing modes. Most memory access that was not hard-coded into the program was via HL, with the contents of the memory location pointed to by HL, (HL) in Z80 speak, being referred to a 'M'. This also occupies a place in the 8-bit instruction groups as if it were another register. Other than that, there was PUSH and POP to the stack but not easy random access to it. The upshot is that 8080 code is often peppered with INC and DEC instructions of HL to access a set of related values.
One consequence of the 8080 having so many registers is that, though there weren't many addressing modes, most of the possible 256 opcodes were used. A whole quarter of them, 64 opcodes, for the 8-bit load group, i.e. moving a value from one register to another. So when the Z80 added extensions, including the IX and IY registers and the instructions that used them, these were longer instructions that took longer to fetch and decode. But these registers do seem to be aimed at supporting either access to a stack frame in the way a compiler would implement local variables, with the ability to load IX or IY from SP, or the members of a structure (C) or record (Pascal).
It would not have caused any excitement at Acorn as they were already pursuing the ARM as their more modern processor. The advantage of 6502 compatibility is for running 6502 code written in assembler. As soon as you want to run code written in a high level language it is only the code generating part of the compiler you need to change.
Back to the other 8-bit processors of the day, the 8080, before the Z80, had plenty of registers but didn't have many addressing modes. Most memory access that was not hard-coded into the program was via HL, with the contents of the memory location pointed to by HL, (HL) in Z80 speak, being referred to a 'M'. This also occupies a place in the 8-bit instruction groups as if it were another register. Other than that, there was PUSH and POP to the stack but not easy random access to it. The upshot is that 8080 code is often peppered with INC and DEC instructions of HL to access a set of related values.
One consequence of the 8080 having so many registers is that, though there weren't many addressing modes, most of the possible 256 opcodes were used. A whole quarter of them, 64 opcodes, for the 8-bit load group, i.e. moving a value from one register to another. So when the Z80 added extensions, including the IX and IY registers and the instructions that used them, these were longer instructions that took longer to fetch and decode. But these registers do seem to be aimed at supporting either access to a stack frame in the way a compiler would implement local variables, with the ability to load IX or IY from SP, or the members of a structure (C) or record (Pascal).
Statistics: Posted by Coeus — Thu Feb 20, 2025 11:57 pm